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Multiprocessor system based on Nios II Altera programmable cores

Klimenko I., A., Tkachenko V.V., Storozhuk O.M.

General information of the methodology of multiprocessor systems on chip based on FPGA are provided. The features of a standard design flow facilities SOPC Builder Altera to develop multiprocessor systems are considered. Modeling and research of programmable multiprocessor cores NIOS II Altera, which is designed for highperformance control functions are completed.


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